Non-volatile semiconductor memory devices are fundamental components of conventional computer systems design. The basic unit of a memory device is the memory cell. The memory cell is the primary mechanism by which data is stored in non-volatile memory devices. Many conventional memory systems can accommodate a maximum storage capacity of one bit per cell that can assume two possible states. It should be appreciated that semiconductor memory cells having more than two possible states are known in the prior art.
A conventional flash memory cell may be comprised of a single field effect transistor (FET) which includes a select gate, a floating gate, a source, and a drain. Information is stored in the flash cell by altering the amount of charge on the floating gate, which causes the threshold voltage of the flash memory cell to be varied. The flash memory cell is read by applying a select voltage via a wordline that is coupled to the select gate. The amount of current that the flash memory cell conducts when the select voltage is applied to the wordline is determined by the threshold voltage of the flash cell.
In theory a flash cell memory can possess a separate identifiable state for each electron that is placed on the floating gate. In practice, however, conventional flash memory cells most often may assume only two possible states because of flash memory cell structure inconsistencies, memory cell differences in charge loss over time, thermal considerations and inaccuracies in sensing the charge on the floating gate that affect the ability to determine the data stored in the flash memory cell. The two states that may be assumed are generally termed “programmed” and “erased,” and each state corresponds to a specified range of voltages.
In order to distinguish between the two possible states, the states are separated by a range of separation voltages. When a flash cell is read, the threshold voltage of the flash cell is compared to the threshold voltage of a reference flash cell that has a threshold voltage that is set in the separation range. A single comparator is generally employed to make the comparison between the memory cell voltage and the reference cell voltage and to output the result. If the flash cell is programmed, excess electrons are trapped on the floating gate, and the threshold voltage of the flash cell is increased to the point where the selected flash cell conducts less drain-source current than the reference flash cell. The programmed state of the prior flash cell is typically indicated by a logic 0. If the prior flash cell is erased, little or no excess electrons are on the floating gate, and the flash cell conducts more drain-source current than the reference cell. The erased state of the prior flash cell is typically indicated by a logic 1. In this manner the voltages present in a memory cell may be distinguished.
Assuming that the flash cell is initially in the erased state, the flash cell is programmed by placing charge on the floating gate such that the threshold voltage Vt of the flash cell is increased. Conventional flash cells are programmed via hot electron injection through the application of a source voltage to the source of the flash cell, a programming voltage to the drain of the flash cell, and a cell selection voltage to the select gate of the flash cell that is adequate to change the amount of charge stored by the flash cell. The source voltage is typically the system ground voltage. The programming operation is typically controlled by system control electronics or a state machine. Other memory technologies may be employed to program the memory cell by varying the amount of charge that is stored in the memory cell.
Conventionally write verify schemes are employed to monitor the amount of charge stored in the floating gate of the flash cell when programming the flash cell to insure that the flash cell is, in fact, placed in the “programmed” state and contains the appropriate amount of charge. Write verify schemes typically involve a series of write and read operations in which the flash cell is alternately written to and read from in order to determine whether the cell has been programmed appropriately. One prior art write verify scheme performs the read operation using a program verify reference cell having its Vt set to a voltage that defines the programmed state of the flash cell. Over programming is typically not a concern because there are no states beyond the programmed state for single-bit flash cells.
Standard reference cells allow the comparison of a value present in a memory cell with a value stored in the standard reference cell. Ideally the standard reference cell is chosen to be as close in terms of the characteristics that it exhibits to the memory cell that it measures as is possible. In the memory manufacturing process manufactured memory lots may exhibit characteristics that vary from lot to lot. In some cases the variation may be the result of process variation (e.g., such as implantation process etc.). Process variation may cause critical parameters such as the source resistance shown to differ in manufactured memory lots. It should be appreciated that differences in source resistance may affect the amount of charge or current that may be maintained in a memory cell. In some cases the source resistances shown by acceptable memories may vary by 10% or more. Conventional methodologies do not compensate for such variation in acceptable source resistance and many satisfactory memories are unnecessarily discarded.